;--------------------------------------------------------------;
; RL78@P6‚̃eƒXƒg 2011-10-27ì¬@By Miyazawa
; 2011-11-08XV
;--------------------------------------------------------------;
RAM_bottom EQU 0EF00H
DS 64
;--------------------------------------------------------------;
RVECT CSEG AT 0H
DW a_reset ;ƒŠƒZƒbƒg‚ÖƒWƒƒƒ“ƒv
;----------------------------------------------------------;
OPT CSEG OPT_BYTE
DB 060H ;ƒIƒvƒVƒ‡ƒ“ƒoƒCƒg000COH ‚v‚c‚s‚ÌÝ’è Š„‚螂ݖ³‚µ p.594
DB 03FH ;ƒIƒvƒVƒ‡ƒ“ƒoƒCƒg000C1H ’á“dˆ³ŒŸo = 1.88‚u p.596
DB 0E0H ;ƒIƒvƒVƒ‡ƒ“ƒoƒCƒg000C2H ‚‘¬ƒƒCƒ“ 24MHz p.597
DB 085H ;ƒIƒvƒVƒ‡ƒ“ƒoƒCƒg000C3H ƒIƒ“ƒ`ƒbƒvƒfƒoƒbƒO@‹–‰Â p.691
;
CSEG
ORG 02000H ;ƒ†[ƒU[ƒvƒƒOƒ‰ƒ€ŠJŽn”Ô’n
a_reset:
MOVW SP, #(RAM_bottom + 80H) ;STACK Pointer ‚ðÝ’è
MOV CMC, #00H ;ŠO•””Uƒ‚[ƒh –\‘––hŽ~‚Ì‚½‚ßCMC = 00H ‚ÉÝ’èH p.127
MOV HOCODIV,#00H ;HOCOŽü”g” = 24MHz (ƒŠƒZƒbƒgŽž •s’è) with op_byte p.136 (p.295)
MOV PM6, #0F3H ;P6.2 & P6.3 ‚ðo—̓‚[ƒh‚ÉÝ’è P.108 (p.255)
MOV P6, #0FFH ;P6 ‚ðoff
SEL RB0 ;RBw’Ê탂[ƒhx‚ÉØ‚è‘Ö‚¦ ----- (p.255)
;----------------------------------------------------------;
register_clear:
MOV A, #00H ;A = 00
MOV X, A ;X = 0
MOVW BC, AX ;BC = 00
MOVW DE, AX ;DE = 00
;----------------------------------------------------------;
main_loop: ;¡¡¡¡¡ƒƒCƒ“ƒ‹[ƒv¡¡¡¡¡¡¡¡¡¡
;----------------------------------------------------------;
DECW BC
MOVW AX, BC
CMPW AX, #0000H
SKNZ
DECW DE
MOV A, E
AND A, #40H
SKNZ ;if bit = 0 then
SET1 P6.2 ; P62 LED off
SKZ ;if bit = 1 then
CLR1 P6.2 ; P62 LED on
BR main_loop ;Go to ---> main_loop
;
;¡¡¡¡¡ End of ƒƒCƒ“ƒ‹[ƒv ¡¡¡¡¡¡¡¡¡¡¡¡¡¡
;
END
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